Overview

In this book, internationally recognized researchers give a state-of-the-art overview of the electronic device architectures required for the nano-CMOS era and beyond.

Challenges and Core Technologies

Challenges relevant to the scaling of CMOS nanoelectronics are addressed through different core CMOS and memory device options in the first part of the book.

Future Concepts and Limits

The second part reviews new device concepts for nanoelectronics beyond CMOS. The book covers the fundamental limits of core CMOS, improving scaling by the introduction of new materials or processes, new architectures using SOI, multigates and multichannels, and quantum computing.